The present invention is directed, in general, to a method of forming a semiconductor device and, more specifically, to a method of forming metal oxide metal capacitors using a multi-step rapid thermal process and a semiconductor device that is formed from that process.
Throughout the evolution of integrated circuits, an objective of device scaling has been to increase circuit performance and to increase the functional complexity of the circuits as efficiently was possible. Additionally, as larger demands have been placed on today""s integrated circuits, it has become highly desirable to integrate various electrical components into the overall circuit design.
One such electrical device that has been recently integrated into the circuit design is the metal oxide metal (MOM) capacitor. Typically, as indicated by the name, a MOM capacitor consists of a first metal electrode covered by an oxide layer, which is, in turn, covered by a second metal electrode. While the MOM capacitor""s incorporation into integrated circuit design has been widely accepted, its incorporation has brought certain problems into the fabrication process, such as contamination problems, metal diffusion into the oxide and multiple processing steps that are required to achieve the desired structure.
During the MOM capacitor""s production, a different machine is required to deposit each of the capacitor""s layers. The first metal electrode is formed in one or more deposition chambers of a metal deposition machine by depositing a metal stack (commonly Ti/TiN) on a substrate (typically silicon), which is then subjected to a temperature sufficient to form a metal silicide interface between the substrate, which typically contains silicon, and the metal layer. After forming the first metal electrode, the partially constructed device is removed from the metal deposition chamber and moved to another chamber having an oxide deposition chamber where the oxide layer of the MOM capacitor is deposited. Next, the apparatus is then returned a metal deposition machine to form the second metal electrode of the capacitor.
By requiring multiple steps and multiple machines to complete the capacitor fabrication, the chances of exposure to numerous contaminants and possible misprocessing steps is substantially increased. Over time and after fabricating multiple lots of devices, contaminants from previous lots tend to remain within the various chambers, constituting risks to later lots placed within the same chamber. Previously, small concentrations of contaminants did not pose serious problems for manufacturers when the semiconductor. structures were rather large. Unfortunately, with semiconductor dimensions rapidly shrinking, contaminants, which once were not a chief concern, now pose a strong possibility of limiting yield and reduced revenue from product. In response, manufacturers now seek ways of reducing the exposure of semiconductor devices to contaminants during production. In light of these risks, manufacturers constantly seek ways to reduce the risk of contamination of their devices and misprocessing steps.
Another problem associated with conventional processes is metal diffusion into the oxide, which can cause leakage or malfunction within the capacitor. As previously mentioned, the oxide is deposited in a different machine than one in which the metal electrode is deposited. As such, the oxide is typically very different from the metal. For example, the metal electrode may be titanium and the oxide may be silicon dioxide. In such instances, the titanium may diffuse into the silicon dioxide, which may lead to the previously mentioned problems.
Also, as discussed above, the present conventional processes require multiple steps and multiple tools, which may result in misprocessing the wrong recipe, etc. The metal is deposited in one tool and the oxide is deposited in another. Because of the extra steps required to move the wafer from one tool to another, these multiple steps are costly in both time and money and are, therefore, inefficient.
Accordingly, what is needed in the art is method that addresses the deficiencies associated with the present conventional processes discussed above.
To address the above-discussed deficiencies of the prior art, the present invention provides a method of forming a metal oxide metal (MOM)capacitor on a substrate, such as a silicon substrate, of a semiconductor wafer in a rapid thermal processor (RTP). In a preferred embodiment, the MOM capacitor is fabricated by forming a metal layer on the semiconductor substrate. The metal layer is then subjected to a first RTP. During this step, a portion of the metal layer is converted to a metal silicide layer between the metal layer and the semiconductor substrate. Then another portion of the metal layer is converted or oxidized to form a metal oxide from the metal layer. The portion of the metal layer that is not converted to the metal silicide or metal oxide serves as the underlying first metal electrode. The metal oxide serves as the dielectric layer of the MOM capacitor. Following the formation of the dielectric layer, a second metal electrode layer is then conventionally formed on the metal oxide, which completes the formation of the MOM capacitor. In one particularly advantageous embodiment of the present invention the first electrode layer and the metal oxide layer are formed in a single RTP machine or tool.
In an alternative embodiment, however, the method further comprises subjecting the metal layer, during the first RTP, to a substantially inert but nitrogen-free atmosphere prior to subjecting the metal layer to a second rapid thermal process.
Thus, in a broad scope, the present invention provides a method wherein the bottom electrode and dielectric layer of the MOM capacitor are formed in a single tool and from a single metal layer without the additional steps associated with conventional processes, which typically includes separate tools and steps for forming the bottom electrode and the oxide layer. Moreover, as just discussed above, other aspects of the present invention further provide the benefit of fabricating at least the MOM capacitor""s bottom electrode and dielectric layer in a single RTP tool/apparatus. This provides the advantage of eliminating not only extra processing steps, but also eliminates the need to move the semiconductor wafer to different tools, thereby saving time, manufacturing costs and reducing possible contamination and misprocessing problems.
The metal layer in the present invention may be selected from several well known metals that are used in the fabrication semiconductor wafer. By way of example only, the metal layer may be tantalum, titanium, cobalt, nickel, molybdenum or combinations thereof.
As with most semiconductor wafer fabrication processes, processing temperatures play an important role, which is the case for the present invention. Thus, in one embodiment, subjecting the metal layer to a first rapid thermal process includes subjecting the metal layer to a rapid thermal process having a temperature ranging from about 400xc2x0 C. to about 900xc2x0 C., and in another, subjecting the metal layer to a second rapid thermal process includes subjecting the metal layer to a rapid thermal process having a temperature-ranging from about 500xc2x0 C. to about 1100xc2x0 C.
A particularly advantageous embodiment of the present invention includes forming a metal silicide as a part of or as the first metal electrode layer. The metal silicide is formed from a portion of the metal layer during the first rapid thermal process. It should be understood that the metal silicide discussed herein is intended to include a self-aligned silicide, commonly known as a salicide. In various embodiments, forming a metal silicide includes forming a metal silicide selected from either tantalum silicide, titanium silicide, cobalt silicide, nickel silicide or molybdenum silicide. Other known metal silicides are, of course, within the scope of the present invention.
In another embodiment, the metal oxide is formed by subjecting the remaining portion of the metal layer to a second rapid thermal process in an atmosphere containing oxygen that includes introducing a flow of oxygen having a flow rate ranging from about 1 slm to about 40 slm into the tool/apparatus to oxidize the remaining portion of the metal layer. However, it should be understood that the flow range may vary from tool to tool or even vary depending on wafer size.
In yet another aspect, the present invention provides a semiconductor device fabricated in accordance with the present invention. In one such embodiment, the semiconductor device includes a silicon substrate and a MOM capacitor formed on the silicon substrate. The MOM capacitor includes a first electrode layer formed on the silicon substrate that comprises a metal silicide, which forms at least a portion, if not all, of the electrode metal. The metal oxide layer is formed on the first metal electrode layer and comprises a remaining portion of the electrode metal. The second electrode layer is formed on the metal oxide.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.